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Design & Simulation of LNA in 90nm CMOS Technology for Radio Receiver using the Cadence Simulation Tool

Dhananjay Nayak


Due to its successful operation in the 2.4 GHz frequency region, often known as the ISM (Industrial, Scientific, and Medical) band, RFICs play a vital role in communication systems. The major parts being used transceivers for frequency translation & amplification are LNA and Mixers. Different types of mixers and LNAs are employed, and different strategies are used to optimize them. In this paper an approach for design and simulation of cascode LNA is discussed to increase to efficiency & Radio Frequency (RF) performance of LNA. More emphasis is put here on the optimization of design. The LNA parameters show how the amplifier is going to work for the proposed design. A low noise amplifier simulated in 90nm CMOS technology. The proposed cascode LNA consists of two transistors. It exhibits 2.5-dB noise figure and 23-dB gain at 2.4 GHz while consuming only 44 nW, this results are confirmed after post layout simulations. These straightforward and analytical conclusions are particularly important since they may be used not only

to build CMOS LNA circuits, and to characterise and diagnose them, whether functional prototypes or built. The Communication System's core building block or key component is a Low Noise Amplifier. Any radio receiver is made up of a Low Noise Amplifier, a mixer, and a Filter (Power Efficient Active Filter), with the LNA playing a critical part in the circuit as an amplifier.


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